HDMI 2.1 Tx PHY in TSMC (16nm, 12nm, N7, N6, N4, N3E)

Overview

The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the necessary logic to implement and verify designs for various HDMI-based
applications. The IP provides quality digital video and audio transmission with up to 48Gbps aggregate bandwidth for uncompressed 8K resolution at 60Hz refresh rate. It supports key features of HDMI 2.1 including dynamic HDR and enhanced audio return channel (eARC), ensuring higher frame-by-frame video quality and most advanced audio formats. The IP also supports latest HDMI
2.1a addition for Source based tone mapping.

The complete power- and area-optimized HDMI 2.1 TX IP solution encompasses a suite of configurable digital controllers, high-speed,
mixed-signal PHY IP, verification IP, High-bandwidth Digital Camera Protection (HDCP) embedded security modules, Display Stream Compression (DSC) IP, all pre-integrated and shipped with a reference system. Having all necessary
design blocks for the HDMI subsystem, the IP solution enables system-on-chip (SoC) designers to lower integration risk and accelerate time-to-market.

Key Features

Fixed rate link with 12Gbps per lane or aggregate bandwidth of 48Gbps to support up to uncompressed 8K resolution at 60 Hz frame rate
Hot Plug Detect allows changing of cables and components without switching off the entire system
Integrated test features including scope, BIST and loopbacks
Optimized pin count, small area to ensure low BOM cost
Enhanced audio return channel (eARC)
Aggressive ESD protection
Fully backward compatible with HDMI 2.0b and 1.4a specifications
Integrated test features including scope, BIST and loopbacks
Optimized pin count, small area and low power ensure low BOM cost

Benefits

HDMI 2.1 TX IP solution includes PHYs, controllers, HDCP embedded security modules (ESMs), and verification IP
Compliant with the HDMI 2.1a, 2.0b, 1.4b and HDCP 2.3, 1.4 and VESA DSC 1.2a
specifications
Support for key HDMI 2.1a features such as fixed-rate link capable of 48Gbps aggregated bandwidth, enhanced metadata packets including dynamic HDR, eARC, auto low-latency mode and variable refresh rate.
Optimized for low power and small area.
Timing hardened blocks simplify placement and design closure
Configurable controller architecture optimized for power, performance, and area

Applications

Game consoles
Digital camera and camcorders
Streaming-media players
Graphic Cards
In Vehicle Infotainment (IVI)
Laptops and PC’s
Blu-ray/DVD players or recorders
Set-top boxes
Home theater systems, audio/video receivers and sound bars

Deliverables

Databook
Application notes
Assembly guidelines
Simulation model
Testbench
Design files kit: Behavioral model
.LEF file & .LIB file
GDSII layout database

Technical Specifications

Foundry, Node

TSMC 16nm, 12nm, N7, N6, N4, N3E - FFC, FF, EFF

Availability

Contact the Vendor

TSMC

Pre-Silicon: 3nm , 4nm , 6nm , 7nm , 12nm , 16nm

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