The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the necessary logic to implement and verify designs for various HDMI-based
applications. The IP provides quality digital video and audio transmission with up to 48Gbps aggregate bandwidth for uncompressed 8K resolution at 60Hz refresh rate. It supports key features of HDMI 2.1 including dynamic HDR and enhanced audio return channel (eARC), ensuring higher frame-by-frame video quality and most advanced audio formats. The IP also supports latest HDMI
2.1a addition for Source based tone mapping.
The complete power- and area-optimized HDMI 2.1 TX IP solution encompasses a suite of configurable digital controllers, high-speed,
mixed-signal PHY IP, verification IP, High-bandwidth Digital Camera Protection (HDCP) embedded security modules, Display Stream Compression (DSC) IP, all pre-integrated and shipped with a reference system. Having all necessary
design blocks for the HDMI subsystem, the IP solution enables system-on-chip (SoC) designers to lower integration risk and accelerate time-to-market.
HDMI 2.1 Tx PHY in GF (12nm)
Overview
Key Features
- Fixed rate link with 12Gbps per lane or aggregate bandwidth of 48Gbps to support up to uncompressed 8K resolution at 60 Hz frame rate
- Hot Plug Detect allows changing of cables and components without switching off the entire system
- Integrated test features including scope, BIST and loopbacks
- Optimized pin count, small area to ensure low BOM cost
- Enhanced audio return channel (eARC)
- Aggressive ESD protection
- Fully backward compatible with HDMI 2.0b and 1.4a specifications
- Integrated test features including scope, BIST and loopbacks
- Optimized pin count, small area and low power ensure low BOM cost
Benefits
- HDMI 2.1 TX IP solution includes PHYs, controllers, HDCP embedded security modules (ESMs), and verification IP
- Compliant with the HDMI 2.1a, 2.0b, 1.4b and HDCP 2.3, 1.4 and VESA DSC 1.2a
- specifications
- Support for key HDMI 2.1a features such as fixed-rate link capable of 48Gbps aggregated bandwidth, enhanced metadata packets including dynamic HDR, eARC, auto low-latency mode and variable refresh rate.
- Optimized for low power and small area.
- Timing hardened blocks simplify placement and design closure
- Configurable controller architecture optimized for power, performance, and area
Applications
- Game consoles
- Digital camera and camcorders
- Streaming-media players
- Graphic Cards
- In Vehicle Infotainment (IVI)
- Laptops and PC’s
- Blu-ray/DVD players or recorders
- Set-top boxes
- Home theater systems, audio/video receivers and sound bars
Deliverables
- Databook
- Application notes
- Assembly guidelines
- Simulation model
- Testbench
- Design files kit: Behavioral model
- .LEF file & .LIB file
- GDSII layout database
Technical Specifications
Foundry, Node
GF 12nm - LP
Maturity
Available on request
Availability
Available
GLOBALFOUNDRIES
Pre-Silicon:
12nm
Related IPs
- HDMI 2.1 Tx PHY in GF 12LP , North/South Poly Orientation
- HDMI 2.1 eARC Rx PHY in GF 12LP 1.8V, North/South Poly Orientation
- HDMI 2.1 eARC Tx PHY in SS 14LPP 1.8V, North/South Poly Orientation
- HDMI 2.1 eARC TX PHY in TSMC 12FFC 1.8V, North/South Poly Orientation
- HDMI 2.1 eARC TX PHY in TSMC 16FFC 1.8V, North/South Poly Orientation
- HDMI 2.1 Tx PHY in SS 14LPP , North/South Poly Orientation