HDMI 2.1 eARC Tx PHY in SS 14LPP 1.8V, North/South Poly Orientation

Overview

The HDMI 2.1 RX Controller and PHY IP solutions, compliant with the HDMI 2.1 specification, provide the necessary logic to implement and verify designs for various HDMI-based applications. The silicon-proven HDMI 2.1 IP provides quality digital video and audio transmission with up to 48Gbps aggregate bandwidth for uncompressed 8K resolution at 60Hz refresh rate. It supports the required features of HDMI 2.1 including dynamic HDR and enhanced audio return channel (eARC) and more, ensuring higher video quality and most advanced audio formats.

The power- and area-optimized HDMI 2.1 IP solutions encompass a suite of configurable digital controllers, High-Bandwidth Digital Content Protection (HDCP) embedded security modules (ESMs), high-speed mixed-signal PHYs, PLLs, verification IP, IP Prototyping Kits, Linux software drivers, and IP subsystems. The highly efficient HDCP 2.3 on HDMI ESMs are designed to protect premium audio-visual content against unauthorized copying, interception, and tampering while meeting stringent security specification requirements.

Having all necessary design blocks for the HDMI subsystem enables system-on-chip (SoC) designers to lower integration risk and accelerate time-to-market.

Key Features

  • HDMI 2.1 RX IP solution includes PHYs, controllers, HDCP embedded security modules, and verification IP
  • Compliant with the HDMI 2.1, 2.0, 1.4, and HDCP 2.3, 1.4 specifications
  • Support for key HDMI 2.1 features such as fixed-rate link capable of 48Gbps aggregate bandwidth, enhanced metadata packets including dynamic HDR, eARC, auto low-latency mode, and variable refresh rate
  • Optimized for low power and small area
  • Timing hardened blocks simplify placement and design closure
  • Configurable controller architecture optimized for power, performance, and area

Block Diagram

HDMI 2.1 eARC Tx PHY in SS 14LPP 1.8V, North/South Poly Orientation Block Diagram

Technical Specifications

Foundry, Node
SS 14LPP 1.8V, North/South Poly Orientation
Samsung
Pre-Silicon: 14nm
×
Semiconductor IP