HDMI 2.0 Rx PHY & Controller IP, Silicon Proven in TSMC 12FFC

Overview

This HDMI 2.O Rx IP provides a complete HDMI receiver function and complies with HDMI specification version 2.0b. It consists of two modules, a physical layer (PHY) and a link module. The PHY is upper compatible with DVI receiver and implemented as a hard IP based on TSMC 28HPC+ CMOS logic process, while the link module is implemented as a synthesizable soft IP. Built-in High bandwidth Digital Content Protection (HDCP) cipher protects the transmission of audiovisual content.

Key Features

HDMI version 2.0b compliant receive
Supports HDCP 2.2/HDCP 1.4
Supports CEA-861F/VESA DMT up to 4K2K
Supports 3D formats (Frame packing/Side by Side Half/Top & Bottom)
Wide range channel speed up to 6.0Gbps
Deep Color Mode support at 24, 30, and 36 bit per pixel
Programmable color space converter includes BT601/709/2020(NonConst)/RGB/xvYCC
Adjustable analog characteristics
Supports I2S, S/PDIF and DSD audios
1.8V/0.9V power supply
Full testability
3D formats with Frame Packing/Side by Side Half/Top & Bottom
Silicon proven in TSMC 12FFC

Applications

Digital TV
Tablets
Mobile phones
Digital camera
Camcorders
Soundbars
Audio/Video Receivers
DVD players
Recorders
Streaming-media players
Set-top boxes
Home theater systems
Game consoles

Deliverables

RTL code
GDS2 at foundry merge
Documentations included Link and PHY specifications
SoC integration guidelines
Board level design guidelines to pass HDMI certification

Technical Specifications

Foundry, Node

TSMC 12FFC

Maturity

In Production

Availability

Immediate

TSMC

In Production: 12nm

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