HDMI 1.4 Receiver IP, Single or dual port in SMIC 40LL
Overview
HDMI 1.4b compliant, 2.97 Gbps
Key Features
- - Clock range : 25-300MHz
- - Built in Low-jitter PLL
- - PADS cell includes ESD protection circuit
- - Built in termination resistor
Deliverables
- Link in RTL code and PHY GDS2 at foundry merge
Technical Specifications
Foundry, Node
SMIC, 40nm LL
Maturity
silicon-proven and production-proven
Availability
Design kit ready
SMIC
Silicon Proven:
40nm
LL
Related IPs
- HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in SMIC 40LL
- HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in SMIC 65/55G
- HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in SMIC 65/55SP
- HDMI 1.4 Rx PHY & Controller IP, Silicon Proven in SMIC 65/55SP
- eDisplay Port v1.4 Rx PHY IP in 40LL, Silicon Proven in SMIC 40LL
- HDMI 2.0 TX PHY 6Gbps in SMIC (28nm)