The Giga MAC IP is an embedded Fast Ethernet controller module. It is compliant with IEEE 802.3 specification for 10/100Mbps Ethernet and the IEEE802.3ab specification for 1000Mbps Ethernet MAC. The integrated checksum offload engines enable the automatic generation TCP Level checksum for received and transmitted Ethernet Frame, support TCP segmentation and UDP fragment to offload the task from the CPU for Linux OS applications. By using a 32-bit CPU local bus and memory local bus, it provides a standard interface to the host CPU. The Ethernet Controller interfaces to the IEEE Std 802.3u MII interface as well as RMII interface, to the IEEE Std 802.3ab RGMII interface, and also support IEEE 802.3x full-duplex flow control.
Gigabit Ethernet 802.3 MAC Controller IP
Overview
Key Features
- Supports CPU local bus interface for controlling Ethernet MAC internal registers.
- Supports 32-bit memory local bus interface
- Comply with IEEE 802.3u MII interface.
- Support Reduced MII interface
- Support Reduced GMII interface
- Full Duplex/Half Duplex capability for 10M/100M MAC
- 1000M MAC only supports Full-duplex.
- Support IEEE 802.3x full Duplex Flow Control
- Support IEEE 802.1Q VLAN tagging (Tagged MAC frame)
- Supports wake-on-LAN function and remote wake-up (Magic packet and Link Status Change).
- Integrated two large integrated transmit (2KB) and receive (16KB) FIFO Devices.
- Supports a 28-bit general purpose timer with the MAC clock as the clock source, to generate timer interrupt.
Benefits
- Fully compliant core with proven silicon
- Premier direct support from IP Core designers
- Easy-to-use industry standard test environment
- Unencrypted source code allows easy implementation
Block Diagram
Applications
- Network Interface Adapter
- Embedded system such as STB, IP STB , etc .
- Provides loopback mode for easy system diagnostics.
- Supports TDP/UDP checksum for Transmitter and Receiver.
- Support individual IPv4/IPv6 checksum format.
- Support PPPoE Session stage packet receiver.
- Receiver support SNAP/Ethernet II/802.1q VLAN tags frame format checksum offloading.
- Support back pressure flow control in half-duplex mode.
- Support TSO function for Linux OS.
- Support UFO function for Linux OS.
- TX support insert VLAN TAG Function
Deliverables
- RTL design in Verilog
- Synthesis scripts
- Technical documents
- Sample device drivers
Technical Specifications
Foundry, Node
Independent
Maturity
In Production
Availability
Immediate