eMMC 5.1 Nex Bus Driver

Overview

eMMC 5.1 Nex Bus Driver is a production-ready software stack for eMMC 5.1 Host Controller IP that is used to connect eMMC devices. The eMMC 5.1 stacks can also be used for validating a device during its development and integration life cycles thereby helping designers to reduce the time to market for their product. The modular neX+ stack is architected to be OS and platform independent which eases porting effort. It has thin OS and hardware abstraction layers making it highly portable. The neX+ stack provides a generic API set to access, control and configure the bus driver, host controller driver, and the underlying hardware.

The eMMC 5.1 software stack includes functions for initialization, sending of commands, data transfer, power management, bus configuration, client driver matching, host controller hardware configuration, and shutdown. The neX+ stack can support a single host controller with multiple slots or multiple host controllers with multiple slots. The software stack complies with the latest eMMC standards. It supports eMMC cards with the option for a device to boot directly from these cards using the boot mode feature.

Key Features

  • Compliant with eMMC Specification Version 5.1
  • Backward Compatible to eMMC 4.x
  • HS400:High Speed DDR mode at 200MHz
  • Field Firmware Update
  • Production State Awareness
  • Device Health Report
  • SecureRemovalType Configuration
  • Sleep Notification in PowerOff notification
  • Hardware& Device Initialization
  • Card Register Read/Write
  • Bus Width Switching
  • Bus Speed Switching
  • Packed Read / Write Commandsv
  • Boot Partition and User Data Partition
  • Multiple Block Operations

Benefits

  • Validate and test the device during development.
  • Silicon vendors can use the driver to create a reference system design for their customers

Block Diagram

eMMC 5.1 Nex Bus Driver Block Diagram

Deliverables

  • Source code in c language for application processor eMMC Firmware Driver
  • API Guide
  • User Manual

Technical Specifications

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Semiconductor IP