MSquare's eDP PHY is a highly reliable solution for display interface requirements, supporting resolutions of 4K and higher. By operating at substantially higher bit rates, this eDP solution reduces both the number of wires and pins required compared to interfaces like LVDS, DVI, and HDMI. It is fully compliant with eDP v1.5 and v1.4b standards, and capable of driving up to 8.1Gb/s per lane in configurations up to 4 lanes. It consists of electrical sub-blocks of main-link and AUX channel of PHY for eDP. MSquare provides eDP with superior PPA and offers customization based on customer specifications.
eDP PHY
Overview
Key Features
- Compatible with embedded display port v1.5/v1.4b specification
- Four-lane main link with support for 8.1/5.4/4.32/3.24/2.7/2.43/2.16/1.62Gbps
- Supports Enhanced Framing Mode
- Automatic Link-Training with an option for firmware-controlled Link-Training procedure
- Supports Fast Link Training/No Link Training
- Supports AUX Channel for access to DPCD and EDID
- Supports a maximum 144Hz refresh rate
- Supports variable refresh rate and Adaptive-Sync for VESA Adaptive Sync
- Supports Panel Self Refresh(PSR) function and PSR with selective update (PSR2) function
- Supports VESA DSC v1.01, v1.1, v1.2a with FEC
- Supports Panel Replay (PR) and Adaptive Refresh Panel (APR)
Block Diagram
