DVB-C2 LDPC/ BCH Decoder
Overview
In Digital video broadcasting for cable systems systems, a powerful FEC sub-system is needed. FEC is based on LDPC (Low-Density Parity Check) codes concatenated with BCH (Bose Chaudhuri Hocquenghem) codes, allowing Quasi Error Free operation close to the Shannon limit.
Key Features
- Irregular Parity Check Matrix
- Layered Decoding
- Minimum Sum Algorithm
- Configurable Number of Iterations
- Soft Decision Decoding
- ETSI EN 301 769 V1.3.1 (2015-10) compliant
Deliverables
- Synthesizable Verilog
- System Model (Matlab) and documentation
- Verilog Testbenches
- Documentation
- FPGA testing environment
Technical Specifications
Maturity
silicon proven
Availability
immediately