Dual-Role Device Controller for USB 3.1

Overview

Mature solutions featuring xHCI Host, Device, and Dual-Role

Certified for compliance with USB 3.1 Specification v1.0, and xHCI Specification v1.0, the Cadence® Dual-Role Device Controller IP for USB 3.1 operates in SuperSpeedPlus (10Gbps), SuperSpeed (5Gbps), High-Speed (480Mbps), Full-Speed (12Mbps), and Low-Speed (1.5Mbps) modes. The USB 3.1 PHY interface complies with the PHY interface for the PCIe® and USB 3.1 architectures (PIPE) Specification v3.2, while the USB 2.0 PHY interface complies with UTMI+ Specification, Revision 1.0. Combined with Cadence USB PHY IP for USB Type-C designs, the Cadence Dual-Role Device Controller IP for USB 3.1 provides a complete solution for USB applications that will make use of the new, flexible, USB Type-C connector. The Controller IP is silicon-proven, and has been extensively validated with multiple hardware platforms. The Cadence Dual-Role Device Controller IP for USB 3.1 is part of the compre-hensive Cadence Design IP portfolio comprised of interface, memory, analog, and system and peripheral IP.

Key Features

Compliant with the following specifications: USB 3.1, USB 2.0, and xHCI 1.1
Arm® AMBA® 4 AXI initiator interface with 128-bit data and 64-bit address
AMBA APB4 responder interface with 32-bit data and address
SuperSpeedPlus (10Gbps), SuperSpeed (5Gbps), High-Speed (480Mbps), Full-Speed (12Mbps), and Low-Speed (1.5Mbps) operation
PHY interface support with 32-bit PIPE, and 8-bit UTMI+ interface
Full Link Power Management (U0, U1, U2, and U3) with LFPS and power/clock gating support
Hardware selectable dual mode operation without any software interaction
Low gatecount implementation reuses same logic resource for Host and Device modes based on Intel xHCI specification

Applications

Automotive,
Communications,
Consumer Electronics,
Data Processing,
Industrial and Medical,
Military/Civil Aerospace,
Others

Deliverables

Synthesizable RTL
Testbench
Synthesis and simulation support files
Documentation

Technical Specifications

Maturity

Silicon Proven

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