The Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a push-pull differential driver which provides a nominal source driver resistance of 50 ohms (single-ended).
The output driver is implemented in Analog Bits’ proprietary architecture that uses core devices only. There is only one power supply so there are no power-up/power-down sequence restrictions.
Differential Output Buffer Operational Range Description Symbol Min Typ Max Units Input Frequency FCLK 5 100 600 MHz Input Duty Cycle tDI 40 60 % Output Duty Cycle TDO 45 55 % Driver Series Resistor (Single Ended) RS 50 Ohm Output Slew Rate Trf 4 16 V/ns Output Crossing Voltage VCROSS 0.25 0.55 V Output Variation of Common Mode Voltage VCM DELTA 140 mV Output Voltage High (single ended unterminated) VHIGH 0.825 V Output to Output Pad Skew Tskew -50 50 ps Output Slew Rate Matching ΔTrf 20 % Area A 0.0084 sq.mm Total Power @ 600MHz (terminated) IDD 7 9 mW Total Power @ 600MHz (unterminated) IDD 3.5 5 mW Operational Voltage (Analog) VDDA 0.675 0.75 0.825 V Operational Temperature TOP -40 25 125 C Differential Output Buffer Functional Specification