DDR4 Synthesizable Transactor

Overview

Key Features

• Supports 100% of DDR4 protocol standard JESD79-4, JESD79-4A, JESD79-4A_r2, JESD79-4B, JESD79-4C and JESD79-4D(Draft)
• Supports all the DDR4 commands as per the specs
• Supports up to 16GB device density
• Supports X4,X8,X16 and X32 devices
• Supports all speed grades as per specification
• Supports On-the-fly protocol and data checking
• Supports Programmable Write latency and Read latency
• Supports Programmable burst lengths: 4,8
• Supports Programmable Preamble
• Supports Read preamble training
• Supports the following burst types:
  • Sequential
  • Interleave
• Supports burst order
• Checks for following:
  • Check-points include power up, initialization and power off rules
  • State based rules, Active Command rules
  • Read/Write Command rules etc.,
  • All timing violations
• Supports all mode register programming
• Supports Data Mask and Data Bus Inversion (DBI)
• Supports write leveling for calibrations and ZQ Calibration commands
• Supports Fine Granularity Refresh Mode
• Supports Multipurpose Register
• Supports DQ Vref training
• Supports CRC for Write Operations
• Supports DLL features
• Supports Command Address Parity features
• Supports Post Package Repair (PPR)
• Supports Control Gear down mode and CAL Mode Operation
• Supports Per DRAM Addressability
• Supports Connectivity Test (CT) mode
• Supports MBIST PPR.
• Supports Power Down features and Maximum Power Saving mode
• Models, detects and notifies the test bench of significant events such as transactions, warnings, timing and protocol violations

Benefits

• Compatible with testbench writing using SmartDV's VIP
• All UVM sequences/testcases written with VIP can be reused
• Runs in every major emulators environment
• Runs in custom FPGA platforms

Block Diagram

Deliverables

• Synthesizable transactors
• Complete regression suite containing all the DDR4 testcases
• Examples showing how to connect various components, and usage of Synthesizable Transactor
• Detailed documentation of all DPI, class, task and function's used in verification env
• Documentation contains User's Guide and Release notes

Technical Specifications