DAC Correction Filter
Overview
The AH1002-DCF DAC Correction Filter (DCF) FPGA core family provides correction in the discrete-time digital domain for the sin(x)/x frequency response of a typical Digital to Analog Converter (DAC). Anchor Hill's DCF cores are implemented as multiplierless Finite Impulse Response (FIR) filters with configurable input and output bit widths and automatic arithmetic saturation of the output to prevent numeric rollover distortion.
Key Features
- Efficient, multiplier-free design minimizes resource utilization and power consumption
- Configurable input and output widths
- Multiple tap-length configurations including 9-tap, 7-tap, and 5-tap
- Arithmetic overflow output monitor
- Clock enable
- Output saturation prevents arithmetic rollover
- Static resettable output
- Registered input, registered output
- Clock rates over 714 MHz supported
- Includes complete simulation and verification software support suite
- Custom designs and configurations available
Benefits
- Corrects frequency distortion due to DAC sin(x)/x response
- Highly efficient multiplierless implementation
- Highly configurable
- Low complexity for hardware and power efficiency
- Custom designs and configurations available
Block Diagram
Applications
- Signal Generators
- Modulators
- Test Equipment
- Audio Systems
Deliverables
- Product License
- EDIF or NGC core or source code
- Verilog Test Bench
- Supporting Matlab/Octave code for test vector generation
- Verilog simulation model
- Product Documentation
Technical Specifications
Availability
Now
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