The core is a standalone controller for the Controller Area Network (CAN), widely used in automotive and industrial applications. It conforms to Bosch CAN 2.0B specification (2.0B Active).
The core has a simple CPU interface (8/16/32 bit configurable data width), with small or big endian addressing scheme. Hardware message filtering and 64 byte receive FIFO, enable back-to-back message reception, with minimum CPU load. The core is described at RTL level, allowing target use in FPGA or ASIC technologies.
Configurable CAN Bus Controller
Overview
Key Features
- Conforms to Bosch CAN 2.0B Active
- 11 and 29 bit wide message identifiers
- 8/16/32-bit CPU slave interface with small or big endianness
- Simple interface allows easy connection to CPU
- Supports both standard (11-bit identifier) and extended (29 bit identifier) frames
- Data rate up to 1 Mbps
- Hardware message filtering (dual/single filter)
- 64 byte receive FIFO
- 16-byte transmit buffer
- No overload frames are generated
- Normal & Listen Only Mode
- Single Shot transmission
- Ability to abort transmission
- Readable error counters
- Last Error Code
- Fully synthesizable
- Static synchronous design with positive edge clocking and synchronous reset
- No internal tri-states
- Scan test ready
Technical Specifications
Maturity
Silicon proven,Production proven
Availability
now
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