Common Public Radio Interface (CPRI) v.6.1 IPC

Overview

CPRI (Common Public Radio Interface) is an interfacing standard for high-speed communication of digital radio samples and control data between wireless infrastructure base station inter-modules. MTI’s IPC-CPRI-v.6.1 solution enables the quickest and most reliable deployment of REC (Radio Equipment Controller) interfaces for easy and flexible interfacing to Remote Equipment. It includes all features required to support MC-GSM/LTE/WCDMA/WiMAX standards. MTI’s IPC-CPRI-v.6.1 is a self-contained and fully tested solution compliant with the latest CPRI v.6.1 specification. It builds on or earlier the market leading solutions used today in many eNb field installations as well as in Tier1 DSP ASICs and FPGAs devices.

Key Features

  • Standards: CPRI v.6.1: 2014-07-01 [CPRI] and earlier
  • Air Interfaces Supported: 3GPP GSM/EDGE RAN R9, 3GPP UTRA (UMTS WCDMA), 3GP-E-UTRA (LTE), IEEEE 802.16 (WiMAX)
  • Applications and Technologies Supported: REC
  • Line Baud Rates: From 614.4 Mbps up to 12.16512 Gbps
  • Master / Slave Mode: Yes
  • Sample Widths: From 4 to 20 bits
  • Mapping options: [CPRI] Section 4.2.7.2.1/2/3
  • Mapping modes: [CPRI] Section 4.2.7.2.4 / 5 / 7
  • Maximum Number of Data Carriers: 48 AxC
  • Low Latency Auxiliary Interface for Routing / Chaining: Yes
  • Start-up Sequence and Rate Auto-Negotiation: Yes
  • Debug Loopbacks: Yes L1 / L2
  • Transmitter
    • PCS (Delay Calibration, 8b10b encoder): Yes
    • Scrambling: Yes
  • Receiver
    • PCS (Aligner, Phase Compensation, 8b10b/64b66b decoder): Yes
    • Scrambling: Yes
  • Delay Management: Yes
    • Receive delay measurement including align delays: Yes
    • Transmit delay calibration: Yes
  • Control and Management
    • Ethernet: Yes
    • HDLC: Yes
    • VSS: Yes
    • L1-Inband: Yes
    • Synchronization: Yes
    • Control AxC : Yes

Benefits

  • Multi-Standard Support
  • Fully Featured:
    • Enables individual or simultaneous operations for MC-GSM, UTRA, E-UTRA and WiMAX standards.
  • Silicon Agnostic: Enables Plug & Play and High Capacity operations with rates up to 12.1 Gbps in full compliance to ORI and IR interface requirements.
  • Fully Flexible and Future Proof:
    • Designed in VHDL-83 and targeting any RTL implementation like ASICs, ASSPs and FPGAs. The design is modular and configurable with support for full range sample widths (4 bits to 20 bits).
  • Enable low cost implementations:
    • Leveraging clock rates at 1/20 of the baud rate
  • Advanced Delay Measurement:
    • Measurement resolutions below 1-ns in full compliance to CPRI v.6.1 for multi-hop apps.
  • Interoperable with most of OEMs Radio Equipments (RE):
    • Protocol interoperability has been conducted with most of the Tier1 and Tier2 OEM RE equipments implementation with regression test environment and on the field.

Deliverables

  • Product Brief
  • User Manual
  • Verification Guide
  • Regression Test Environment for Simulation
  • Test Cases, Test Report and Tools
  • IPC Block

Technical Specifications

Foundry, Node
Any
Availability
Q4 2015
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Semiconductor IP