The ColdFire V4 SPPC1 Processor Platform combines the ColdFire V4 Core with industry-proven platform peripherals to form a complete high-performance microcontroller subsystem supported by a vast ecosystem of development tools and runtime software. With the ColdFire V4 SPPC1 Processor Platform, you get:
• Performance—over 500 DMIPS at 345 MHz
• Reliability—from processor and peripheral IP already deployed
in millions of embedded systems worldwide
• Rapid time-to-market—in just a few hours you can be developing
software on your own FPGA implementation of the ColdFire V4 SPPC1 Processor Platform
The ColdFire V4 SPPC1 Processor Platform includes ColdFire V4 Core, plus the fully-integrated peripherals shown in Figure 1, implementing functions commonly needed for embedded systems including interrupt control, DMA, timers, and various serial interfaces. An AMBA 2 AHB Crossbar Switch provides the system interconnect, supporting simultaneous AHB transfers between multiple masters and slaves, including externally-connected AHB masters and slaves.
Variations of the ColdFire V4 SPPC1 Processor Platform with different combinations of on-board peripherals are also available. For example, you can add one or two Ethernet Controllers or you can choose to omit one or more of peripherals to reduce system gate count.
ColdFire V4 SPPC1 Processor Platform
Overview
Key Features
- On-board peripherals and their features include:
- FlexBus Controller
- Connects up to 6 on-chip or off-chip memories/devices
- Independently programmable transfer characteristics for each
- device (wait states, address setup/hold)
- Enhanced DMA (eDMA) Controller
- 16 independently programmable DMA channels
- Programmable channel arbitration modes
- Support for channel linking and scatter/gather operation
- Interrupt Controller
- 64 programmable interrupt sources, 33 of which are available
- for external interrupts
- Unique vector for each interrupt source
- Support for low-power mode wake-up
- Queued SPI (QSPI) module
- Programmable queue for up to 16 SPI transfers
- Four chip-select lines for up to 16 devices
- Programmable baud rate, before-and-after transfer delays,
- clock phase and polarity
- I2C interface module
- Support for the original Philips I2C bus protocol
- Support for baud rates up to 3.4 Mbps
- 3 UARTS
- Programmable clock source, data formats, and modes
- (normal/loopback)
- Error detection
- Four maskable interrupt conditions
- 4 DMA Timer modules
- Programmable clock source
- Programmable prescaler
- Programmable interrupt or DMA request upon timer event
- Miscellaneous Control Module (MCM)
- Software watchdog timer
- Reset status, low-power mode control, and core fault status
- registers
Benefits
- The ColdFire V4 SPPC1 Processor Platform features software-controlled shutdown of selected clocks to support a variety of chip-level low-power modes:
- • Independent shutdown of selected peripheral clocks
- • Shutdown of the ColdFire V4 Core CPU clock in response to a
- ColdFire STOP instruction; the ColdFire V4 Core local SRAM
- Controller clock may optionally be kept running in STOP mode to
- support access to local SRAM from external AHB masters
Block Diagram
Video
Putting the ColdFire Family to Work for You
Deliverables
- Verilog source code
- Integration testbench and tests
- Documentation
- Scripts for simulation and synthesis with commonly-used EDA
- tools
Technical Specifications
Maturity
Silicon Proven
Availability
Now