Chipscope PLBv46 Integrated Bus Analyzer (IBA)

Overview

The ChipScope™ PLB IBA core is a specialized Bus Analyzer core designed to debug embedded systems that contain the IBM CoreConnect™ Processor Local Bus (PLB) version 4.6. The ChipScope PLB46 IBA core in EDK is based on a Tcl script that generates an HDL wrapper to the PLB IBA and calls the ChipScope Core Generator to generate the netlist based on user parameters.

Key Features

  • Probes the master, slave, arbiter, and error status signals of the PLBv46 bus
  • Probes the PLBv46 OR'ed slave signals
  • Automatically adjusts ports to the PLBv46 bus width
  • Separates master, slave, and error status signals into independent match units which can be enabled or disabled by a design parameter
  • Allows independent enabling or disabling of probed master, slave, and error status signals for data capture
  • Supports trigger port customization by a design parameter

Technical Specifications

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Semiconductor IP