CCSDS SCCC Encoder

Overview

The SCE02C is a very high speed 4 state CCSDS compatible serial concatenated convolutional code (SCCC) encoder with frame marker, frame descriptor, coded symbols from QPSK to 64APSK, optional pilot symbols and programmable pseudo-randomiser.

Key Features

  • 4 state CCSDS compatible serially concatenated convolutional code (SCCC) encoder
  • Code rates from 0.355 to 0.899
  • Data lengths from 5758 to 43678 bits
  • Interleaver sizes from 8640 to 65520 bits
  • Symbol interleaver sizes from 16200 to 48600 bits with QPSK, 8PSK, 16APSK, 32APSK or 64APSK modulation and 8100 coded symbols
  • Optional 6-bit coded symbol or 12-bit inphase (I) and quadrature (Q) output
  • Includes 256 symbol frame marker, 64 symbol frame descriptor and optional pilot symbols with programmable I and Q pseudo randomiser
  • Continuous coded symbol data out
  • Up to 575 MHz internal clock
  • Up to 1.14 Gbit/s encoding speed with 213 MHz symbol clock
  • 1191 6-input LUTs and 30 18kB RAMB18s
  • Asynchronous logic free design
  • Available as EDIF and VHDL core for Xilinx FPGAs under SignOnce IP License. ASIC, Intel/Altera, Lattice and Microsemi/Actel cores available on request.

Block Diagram

CCSDS SCCC Encoder Block Diagram

Deliverables

  • Xilinx VHDL and EDIF Core
  • VHDL testbench generation software

Technical Specifications

Availability
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Semiconductor IP