CCSDS AR4JA LDPC Encoder & Decoder
Overview
The Creonic CCSDS AR4JA LDPC IP supports the LDPC coding schemes as defined by the CCSDS standard. The LDPC codes with rates 1/2, 2/3 and 4/5, block lengths 1024, 4096 and 16384 are specially designed for deep-space missions, but the excellent error correction performance makes it the ideal fit for further applications with highest demands on forward error correction.
Key Features
- Support for code rates 1/2, 2/3, and 4/5
- Uncoded block sizes of 1024, 4096, and 16384 bits
- Compliant with “TM Synchronization and Channel Coding, Recommended Standard, CCSDS 131.0-B-3, Blue Book, August 2011”.
Benefits
- Gains up to 3 dB compared to Viterbi decoders.
- Low-power and low-complexity design.
- Layered LDPC decoder architecture, for twice as fast convergence behavior.
- Support for code rates 1/2, 2/3, and 4/5
- Uncoded block sizes of 1024, 4096, and 16384 bits
- Compliant with “TM Synchronization and Channel Coding, Recommended Standard, CCSDS 131.0-B-3, Blue Book, August 2011”.
- Early stopping criterion for iterative LDPC decoder, saving a considerable amount of energy.
- Applications
- Optional fixed number of iterations for fixed latency of blocks with the same code rate and block length.
- Configurable amount of LDPC decoding iterations for trading-off throughput and error correction performance.
- Collection of statistic information (number of iterations, decoding success, number of modified bits).
Applications
- Near-Earth and Deep-Space communication.
- Space links communication.
- Space internetworking services.
- Further High-performance Applications
Deliverables
- VHDL source code or synthesized netlist
- HDL simulation models e.g. for Aldec’s Riviera-PRO
- VHDL testbench
- Bit-accurate Matlab, C or C++ simulation model
- Comprehensive documentation