Capless low input voltage LDO in GF 22FDX
Overview
Capacitor-less low input voltage LDO regulator in GlobalFoundries 22FDX
Key Features
- Low BoM cost - no output capacitor required
- Low Power (LP) mode to supply AON domain
- Programmable output voltage
- Low silicon area
Block Diagram

Technical Specifications
Foundry, Node
GlobalFoundries 22nm FDX
Maturity
Pre-silicon
GLOBALFOUNDRIES
Pre-Silicon:
22nm
FDX
Related IPs
- 3.3V - >1.2V/1.1V/0.9V Low Power Cap-less LDO IP Core
- Low Power 5V->3.0V Cap-less LDO IP Core
- 1.8V and 3.3V Radiation-Hardened GPIOs with Optimized LDO in GF 12nm LP/LP+
- Programmable LDO voltage regulator (output voltage 2.5 V to 2.7 V)
- Programmable LDO voltage regulator (output voltage 2.5 V to 2.7 V)
- Programmable LDO voltage regulator (output voltage 2.5 V to 2.7 V)