The output driver is implemented in Analog Bits’ proprietary architecture that uses core devices only. There is only one power supply so there are no power-up/power-down sequence restrictions.
Differential Output Buffer Operational Range Description Symbol Min Typ Max Units Input Frequency FCLK 25 MHz Input Duty Cycle tDI 40 60 % Output Duty Cycle TDO 45 55 % Output Impedance (Single Ended) RS 44 Ohm Output Slew Rate (with 2pF load) Trf TBD V/ns Output Voltage High (single ended unterminated) VHIGH 1.98 V Output Slew Rate Matching ΔTrf 20 % Total Power @ 25MHz (unterminated, 2pF load) IDD mW Area A TBD sq.mm Operational Voltage – Process nominal (Digital) VDD 0.72 0.8 0.88 Operational Voltage – Process nominal (Analog) VDDA 1.62 1.8 1.98 V Operational Temperature TOP -40 25 150 C Differential Output Buffer Functional Specification
