XIP2201B from Xiphera is an Intellectual Property (IP) core for Ascon authenticated encryption with associated data (AEAD) and hashing.
It supports three variants of AEAD as well as two variants of hashing and extendable output functions (XOF). Notably, XIP2201B provides three different cryptographic primitives all in one IP core. Ascon was selected by the National Institute of Standards and Technology (NIST) to be standardized as the lightweight cryptographic algorithm.
XIP2201B for authenticated encryption and decryption, hashing, and extendable output function operation for all Ascon variants defined in the standard.
Ascon was selected as the lightweight cryptographic algorithm by NIST and can thus be expected to see usage in the coming years. The algorithm itself is optimised to be small in size, support many features, and be especially efficient with small inputs.
The XIP2201B is optimised for both moderate resource usage and fast computation.
Ascon, A Lightweight Cryptographic Suite for AEAD and Hashing
Overview
Key Features
- Small Resource Requirements: XIP2201B requires 2009 Adaptive Lookup Modules (ALMs) (Intel® Cyclone® V E) or 2309 Lookup Tables (LUTs) (Xilinx® Artix-7). Contact sales@xiphera.com for ASIC resource requirements.
- Versatile Algorithm Support: XIP2201B supports ASCON-128/128a/80pq/Hash/Hasha as well as XOF and XOFa. In other words, XIP2201B supports all parameterized algorithms defined in the standard.
- Secure Architecture: The execution time of XIP2201B is independent of the input values and, consequently, provides full protection against timing-based side-channel attacks.
- Standard Compliance: XIP2201B is compliant with Ascon specification 1.2 which is the version that was selected to be standardised by NIST.
- Easy Integration: The 64-bit interface of XIP2201B supports easy integration to various systems.
Benefits
- Fully digital design
- Portable to any ASIC or FPGA technology
- Fully standard compliant
- Easy to integrate
- Several bus interfaces available
- IP core designed in-house at Xiphera
- Technical support by the original designers and cryptographic experts
Block Diagram
Applications
- Lightweight cryptography
Deliverables
- Please contact sales@xiphera.com for pricing and your preferred delivery method. XIP2113H can be shipped in a number of formats, including netlist, source code, or encrypted source code.
- Additionally, synthesis scripts, a comprehensive testbench, a high-level Python model, and a detailed datasheet including an integration guide are included.
Technical Specifications
Foundry, Node
Any
Maturity
Hardware tested
Availability
Immediate
Related IPs
- Performance Enhanced version of uMCTL2 supporting DDR4, DDR3, DDR2, LPDDR4, LPDDR3 and LPDDR2 for Automotive
- Fast Access Controller – a plug-and-play IP solution for fast embedded Flash Programming and Memory Testing
- 2D (vector graphics) & 3D GPU IP A GPU IP combining 3D and 2D rendering features with high performance, low power consumption, and minimum CPU load
- Scalable multicore architecture for a range of macrocells, small cells, cloud-RAN, DFE/DPD/ and more
- 28nm Wirebond IO library with dynamically switchable 1.8V/ 3.3V GPIO, 5V I2C open-drain, 1.8V & 3.3V analog, OTP program cell, and HDMI & LVDS protection macros - featured across a variety of metal stack and pad configuration options
- PCIe Switch for USB4 Hubs, Hosts and Devices