ASA Verification IP

Overview

The ASA Verification IP provides an effective & efficient way to verify the ASA components of an IP or SoC. The ASA VIP is fully compliant with ASA Specification version 1.01, 1.1 and 2.0. The VIP is lightweight with easy plug-and-play components, so there is no hit on the design cycle time.

Key Features

Adherent to ASA Specification version 1.01, 1.1 and 2.0.
Support both Downstream and Upstream Mode of communication
Supports 5 fixed-rate Speed Grades ranging from 2 Gbps to 16 Gbps in Downstream direction
Supports 2 fixed-rate Speed Grades ranging from 2 Gbps to 4 Gbps in Upstream direction
Supports all domains of ASA registers which are as follows:
- User Registers
- PMA/PMD/PCS Registers
- DLL Registers
- Security Registers
- ASEP Registers
- ASE Registers
- ASD Registers
It Supports all types of ASEP Stream Types which are as follows:
- Video Data
- I2C
- Layer2 Ethernet Frames
- SPI
- GPIO
- (e)DP
- I2S
- TEST ASEP
- Forward Data
- Return OAM
It Supports all types of Physical Layer Functions such as TDD, Re-sync header, RS-FEC Framing and Encoding, Scrambling and De-Scrambling, PAM2 Mapping, PAM4 Gray Encoding, PTB, etc.
It supports all types of Link Layer Aggregation Sublayer functions.
It supports all types of Data Link Layer functions such as Data link Layer Transmit functions, Mapping/Multiplexing, OAM Config, Enumeration, Light Sleep, etc.
It supports all types of Application Stream Encapsulation protocol (ASEP) functions such as ASE, ASD, ASEP: Video Data, ASEP: I2C, ASEP: Layer 2 Ethernet Frame, ASEP: SPI, ASEP: GPIO, ASEP: eDP, ASEP: I2S, ASEP: Test Dummy.
Complete ASA Transceiver functionality.
Supports constraints Randomization.
Callback for user control.
A wide variety of error injections
Functional coverage for complete ASA features for version 1.01, 1.1 & 2.0.
Monitors, detects and notifies the testbench of significant events such as transactions, warnings, timing and protocol violations.
ASA Verification IP comes with a complete test suite to test every feature of ASA specification version 1.01, 1.1 and 2.0.
Graphical Analyser to show transactions for easy debugging

Benefits

Available in native System Verilog (UVM) and Verilog
Unique development methodology to ensure the highest levels of quality
Availability of Compliance & Regression Test Suites
24X5 customer support Ø Unique and customizable licensing models
Exhaustive set of assertions and coverage points with connectivity examples for all the components
Consistency of interface, installation, operation, and documentation across all our VIPs
Provide complete solutions and easy integration in IP and SoC environment

Block Diagram

Deliverables

ASA Tx/Rx/BFM/Agent
ASA Monitor & Scoreboard
ASA Test-Bench Configurations
Integration Guide, User Manual and Release Notes
Test Suite (Available in Source code)
- Basic and Directed Protocol Tests
- Random and Dynamic Tests
- Error Scenario Tests
- Assertions & Cover Point Tests
- Conformance Tests

Technical Specifications

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