AES supporting ECB, CBC and XTS/XEX modes. Includes DMA and AXI interface.
Overview
This is a high performance, small footprint crypt/decrypt IP Core. It features up to 8 independent crypt engines. Three DMA engines make sure the core is always provided with a constant data stream. The crypt engines run of a dedicated clock, separate from AXI interfaces.
Key Features
- 100% AES compatible
- >2.4 GB/sec max throughput
- Up to 8 engines in parallel (configurable)
- Supports ECB, CBC and XTS/XEX modes
- Supports BitLocker acceleration
- Supports Encryption and Decryption
- Supports 128, 192 and 256 key sizes
- 4/8 keys can be stored in each engine
- Verified against FIPS test vectors
- Task Based DMA engine
- Configurable Data Path 32, 64 or 128 bit
- Fully AXI-4 compatible (data interface)
- AXI-Light for register Interface
- Separate clocks for AES engines and AXI interface
Benefits
- High Performance, small footprint, flexible
Block Diagram
Deliverables
- Verilog Source Code
- Test bench
- Reference Design
- technical Support
Technical Specifications
Foundry, Node
any
Maturity
Silicon Proven
Availability
now
Related IPs
- PCIe Controller for USB4 Hosts and Devices supporting PCIe Tunneling, with optional built-in DMA and configurable AMBA AXI interface
- Cryptographic library for encryption and decryption of Advanced Encryption Standard (AES) in ECB, CBC, OFB, CTR and GCM modes
- DDR Controller supporting DDR5 and DDR4 with a CHI interface
- DDR Controller supporting DDR5 and DDR4 with a CHI interface and Advanced Feature Package
- DDR Controller supporting DDR5 with a CHI interface and Advanced Feature Package
- Complete memory system supporting any combinations of SDR SDRAM, DDR, DDR2, Mobile SDR, FCRAM, Flash, EEPROM, SRAM and NAND Flash, all in one IP core