8051 Compatible Microcontroller Core

Overview

The so_ip_8051M256 is a soft core of a single-chip 8-bit embedded microcontroller dedicated for operation with fast (on-chip) and slow (off-chip) memories.
So_ip_8051M256 soft core is 100% binary compatible with the industry standard 8051 microcontroller. It executes all ASM51 instructions and has the same instruction set as the 8031. The so_ip_8051M256 serves both software and hardware interrupts, and has standard peripheral units like timers and serial communication system.
So_ip_8051M256 has an advanced architecture that enables it to be 4.51 times faster than the original 8051 microcontroller.
So_ip_8051M256 is delivered with fully automated testbench and a compete set of tests allowing easy package validation at each stage of SoC design flow.
The so_ip_8051M256 is a microcode-free design developed for reuse in FPGA implementations. The design is strictly synchronous with positive-edge clocking, no internal tri-states and a synchronous reset.

Key Features

  • 100% software compatible with industry standard 8051
  • Advanced architecture enables to execute instructions on average 4.51 times faster compared to original 8051
  • 8 times faster multiplication
  • 8 times faster division
  • 4 times faster addition
  • 256 bytes of internal (on-chip) Data Memory
  • Up to 64K bytes of internal (on-chip) or external (off-chip) Program Memory
  • Up to 64K bytes of internal (on-chip) or external (off-chip) Data Memory
  • De-multiplexed Address/Data bus to allow easy connection to memory
  • Fully synthesizable synchronous design with positive edge clocking and no internal tri-states
  • Interrupt Controller
  • 2 priority levels
  • 2 external sources
  • 3 internal sources from peripherals
  • Four 8-bit I/O Ports
  • Separate input and output lines
  • Alternate port functions such as interrupts and serial interface are
  • separated, providing extra port pins in comparison with original 8051
  • Two 16-bit timer/counters
  • Timers clocked by internal source
  • Auto reload 8-bit timers
  • Externally gated event counters
  • Full-duplex serial port
  • Synchronous mode, fixed baud rate
  • 8-bit asynchronous mode, variable baud rate
  • 9-bit asynchronous mode, fixed baud rate
  • 9-bit asynchronous mode, variable baud rate

Deliverables

  • VHDL Source Code or netlist
  • Verification environment with regression suite
  • Technical documentation
  • Installation notes
  • User Manual
  • Datasheet
  • Instantiation templates
  • Reference Design
  • Technical Support
  • IP Core implementation support
  • Variable length maintenance
  • Delivery of IP Core updates, minor and major changes
  • Delivery of documentation updates
  • Telephone & email support

Technical Specifications

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