8-bit Microprocessor

Overview

The iniCPU is a software compatible 6809 microprocessor implemented in VHDL using a stuctured and synchronous design methodology.

This flexible 8-bit microprocessor can be used for low to mid range applications and is easily integrated into any ASIC or FPGA technologies. The iniCPU is designed that application specific performance enhancements (e.g., high-speed multiplier) can be integrated too.

Inicore built a simulation and a hardware verification environment. The simulation environment is VHDL based and simulates the synthesizable VHDL code of the iniCPU. This functional VHDL testbench reading Motorola S-Records from a file can be used for performance check, software verification or to get used to the functionality.

A demonstration board is available which shows the functionality of the iniCPU in a hard ware testbed. For this purpose, the microprocessor is implemented into an Actel FPGA.

Key Features

  • Flexible 8bit Micro Controller Solution for Low to Mid Range Applications
  • 6809 Software Compatible
  • Save Operation, Illegal Opcode Recognition
  • 3rd party C-Compiler, Assembler
  • Address Expansion Circuit (Page Mode)
  • External Interfaces for S/D RAM, IO etc.
  • Hardware Debugging Circuits
  • Fully Synchronous, 100% Technology Independent Design
  • Performance at 40MHz with 25ns RAM:
    • Peak: 10 Mips
    • 8 by 8 unsigned mul: 3.3 Mips
  • Demoboard Available...

Benefits

  • The 'System-on-Silicon' approach with iniCPU 'on board' enables powerful features such as:
  • Extended Memory
  • Software download at start-up
  • Interfaces to serial EEPROM or cheap DRAM
  • DMA with any target and optimized communication with customized functions like filter algorithms and other cores like UART, CAN, HDLC, SPI.
  • For special requirement, like fast interrupt response time, we enhance the iniCPU to your requirment.
  • Demoboard avaliable
  • Standard tools e.g. debugger, assembler and C compiler are available from third parties

Block Diagram

8-bit Microprocessor Block Diagram

Deliverables

  • VHDL or Verilog RTL Source Code
  • Functional Testbench
  • Synthesys Script
  • Data Sheet
  • User Guide
  • Hotline Support by means of phone, fax and e-mail

Technical Specifications

Foundry, Node
Technology independent
Maturity
Silicon proven in ASIC and FPGA Technologies
Availability
now
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Semiconductor IP