The agileDAC GP is a digital-to-analog converter that uses a traditional capacitive DAC architecture. The agileDAC uses its own internal reference voltage. The architecture can achieve up to 10-bit resolution at sample rates up to 16 Msps.
Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. We support all the major foundries including TSMC, GlobalFoundries, Intel Foundry, Samsung Foundry, UMC and Other Foundries.
8/10-bit Digital-to-Analog Converter
Overview
Key Features
- Resolution: 8bits /10bits
- Sampling Rate (Fs): up to 16Msps
- Output Signal Bandwidth: Typ Fs/2
- Guaranteed monotonic
- SFDR1: Typ -60dBc
- INL: Max2 ±4LSB
- DNL: Max2 ±2LSB
- Conversion Time: Typ 2 cycles
- Quiescent current3 (Iq):Typ 250uA
- Customizable design for simple SoC integration
- Integrated Calibration Mode
Benefits
- DFT/DFM
- AMBA-APB Interface to simply test and operation
- Built-in Trim and Calibration to facilitate process and/or manufacturing offsets to be adjusted
Block Diagram
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Applications
- IoT, Security, Automotive, AI, SoCs, ASICs
Deliverables
- Datasheet
- Testing and Integration Guide
- Verilog Models
- Floorplan (LEF)
- Timing models (LIB)
- Netlist (CDL)
- Layout (GDS)
- Physical Verification Report
- Design Report
Technical Specifications
GLOBALFOUNDRIES
Pre-Silicon:
12nm
,
14nm
,
14nm
LPE
,
14nm
LPP
,
20nm
LPM
,
22nm
,
22nm
FDX
,
28nm
,
28nm
FDSOI
,
28nm
HPP
,
28nm
LPH
,
28nm
SLP
,
32nm
,
40nm
LP
,
55nm
,
55nm
LPX
,
65nm
,
65nm
LP
,
65nm
LPe
,
90nm
,
90nm
LP
,
130nm
,
130nm
HP
,
130nm
LP
,
130nm
LV
,
180nm
,
180nm
LL
,
180nm
LL
,
180nm
LP
,
180nm
LP
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