768x39 Bits OTP (One-Time Programmable) IP, TSMC 55ULP 0.9V–1.2V / 2.5V Process

Overview

The ATO0768X39TS055ULP4NL is organized as 768x39 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSMC 55nm LP 1.2V/2.5V & ULP 0.9V/2.5V Mixed-Signal, General Purpose process. The OTP can be widely used in chip ID, security key, memory redundancy, parameter trimming, configuration setting, feature selection, and PROM, etc.

Key Features

Fully compatible with standard TSMC 55nm ULP 0.9–1.2V / 2.5V CMOS process
Low voltage: VDD 0.85–1.32 V read and VDDP 1.77 V ± 5% program
High speed program: 10-us single-bit programming
High speed read: 5-Mhz read clock (200-ns cycle time) at 39-bit word.
Asynchronous mode with output latches
Additional row to store any information
Deep sleep mode by VDD off to save power consumption
Built-in test mode support
Operating temperature range: -40 °C to 150 °C for read and -40 °C to 125 °C for program

Benefits

Small IP size
Low program voltage/current
Low read voltage/current
High reliability
Wide operating temperature range
Silicon characterized

Deliverables

Datasheet
Verilog behavior model and test bench
Timing library
LEF File
Phantom GDSII database

Technical Specifications

Foundry, Node

TSMC 55ULP 0.9V–1.2V / 2.5V Process

Maturity

Silicon Proven & Ready for Production

Availability

Now

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