3.3V to 2.5V with 100mA driving capability; Linear Regulator ; MIFS C40LP Logic Process
Overview
3.3V to 2.5V with 100mA driving capability; Linear Regulator ; MIFS C40LP Logic Process
Technical Specifications
Foundry, Node
MIFS(Fujitsu) 40nm Logic/Mixed_Mode LP
Related IPs
- 1.4V~3.6V to 1.2V with 100mA driving capability; Linear Regulator; UMC 90nm LL/RVT LowK LOGIC PROCESS minLib Cell Library
- 3.3V to 2.5V with 5mA driving capability; Capacitor-free Linear Regulator; UMC 28nm HPC Process
- 3.3V to 2.5V with 5mA driving capability; Capacitor-free Linear Regulator; UMC 0.11um HS/AE Logic Process
- High performance 8-bit micro-controller with 256 bytes on-chip Data RAM, three 16-bit timer/counters, and two 16-bit dptr; 0.25um UMC Logic process.
- 2.7V~3.3V to 1.8V with 150mA driving capability; Linear Regulator; UMC 55nm LP/RVT LowK Logic Process
- 3.3V input , Programmable Output 1.8V/1.2V with 300mA driving capability; Linear Regulator; UMC 55nm SP/RVT LowK Logic Process