1.4V~3.6V to 1.2V with 100mA driving capability; Linear Regulator; UMC 90nm LL/RVT LowK LOGIC PROCESS minLib Cell Library
Overview
1.4V~3.6V to 1.2V with 100mA driving capability; Linear Regulator; UMC 90nm LL/RVT LowK LOGIC PROCESS minLib Cell Library
Technical Specifications
Foundry, Node
UMC 90nm Logic/Mixed_Mode Generic
UMC
Pre-Silicon:
90nm
G
,
90nm
LL
,
90nm
SP
Related IPs
- 3.3V to 1.2V with 150mA driving capability, Istb=200uA; Linear Regulator; UMC 65nm LP/RVT LowK Logic Process
- 3.3V to 1.2V with 180mA driving capability; Linear Regulator; UMC 55nm eFlash LowK Logic process
- 3.3V to 1.2V with 150mA driving capability without external capacitor(Cap-less); use trimming ports (need e-Fuse IP); Linear Regulator; UMC 55nm eFlash LowK Logic Process
- SMIC 0.13um Low Leakage UHD RVT_x005F_x000D_ Logic standard cell library, compatible with E-Flash and EEPROM process.
- High performance 8-bit micro-controller with 256 bytes on-chip Data RAM, three 16-bit timer/counters, and two 16-bit dptr; 0.25um UMC Logic process.
- 2.7V~3.3V to 1.8V with 150mA driving capability; Linear Regulator; UMC 55nm LP/RVT LowK Logic Process