3.3V to 1.2V with 150mA driving capability without external capacitor(Cap-less); use trimming ports (need e-Fuse IP); Linear Regulator; UMC 55nm eFlash LowK Logic Process
Overview
3.3V to 1.2V with 150mA driving capability without external capacitor(Cap-less); use trimming ports (need e-Fuse IP); Linear Regulator; UMC 55nm eFlash LowK Logic Process
Technical Specifications
Foundry, Node
UMC 55nm eNVM EFLASH/EE2PROM/LP-SPLIT_GATE
UMC
Pre-Silicon:
55nm
Related IPs
- 3.3v to 2.5v with 30mA driving capability without external capacitor (Cap-less), use trimming PADs; Linear Regulator; UMC 40nm LP/RVT LowK Logic process
- 3.3V to 2.0V with 288mA driving capability with external capacitor,use trimming ports (need e-Fuse IP); Linear Regulator; UMC 28nm Logic HPC Process
- 2.7V~3.3V to 1.8V with 150mA driving capability; Linear Regulator; UMC 55nm LP/RVT LowK Logic Process
- 3.3V to 1.2V with 150mA driving capability, Istb=200uA; Linear Regulator; UMC 65nm LP/RVT LowK Logic Process
- 3.3V to 1.2V with 180mA driving capability; Linear Regulator; UMC 55nm eFlash LowK Logic process
- 3.3V to 0.75*VCC33A with 5mA driving capability with external capacitor; Linear Regulator; UMC 55nm LP/RVT LowK Logic Process