3.3V 32 KHz RTC and Programmable 100MHz Oscillator I/O Pad Set

Overview

Key Features

• Designed to use a 32.786 kHz external crystal for Real Time Clock applications.
• Optimized for low power, stability and minimum jitter
• Characterized with crystal loading capacitors ranging from 4 pF to 25 pF.
• Power-down and bypass modes
• Speed-up circuitry for fast startup
• Low power (2.0 µW max)
• Operates on core power only (VDD/VSS cells embedded)

Deliverables

• a. Physical abstract in LEF format (.lef)
• b. Timing models in Synopsys Liberty formats (.lib and .db)
• c. Calibre compatible LVS netlist in CDL format (.cdl)
• d. GDSII stream (.gds)
• e. Behavioral Verilog (.v)
• f. Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
• g. Databook (.pdf)
• h. Library User Guide - ESD Guidelines (.pdf)

Technical Specifications