28nm Logic and Mixed-Mode HLP/RVT Process Multi-Voltage BOAC I/O Cell library
Overview
28nm Logic and Mixed-Mode HLP/RVT Process Multi-Voltage BOAC I/O Cell library
Technical Specifications
Foundry, Node
UMC 28nm
Maturity
Pre-Silicon release
UMC
Pre-Silicon:
28nm
HLP
,
28nm
HPC
,
28nm
HPM
,
28nm
LP
Related IPs
- CSMC13V33 process DUPIO, This library includes analog I/O cells and digital I/O cells and supports Inline DUP I/O pad.
- UMC 55nm Logic and Mixed-Mode Ultra Low Power Low-K Process 1.8V/2.5V/3.3V multi-voltage BOAC I/O cell library
- 28nm Logic and Mixed-Mode HPC/RVT Process Multi-Voltage BOAC I/O Cell library
- UMC 28nm Logic and Mixed-Mode HPC Processs Multi-Voltage BOAC SD3.0 I/O Cell library
- 1.8V/3.3V I/O Library with ODIO and 5V HPD in TSMC 12nm
- 1.8V/3.3V I/O library with ODIO and 5V HPD in TSMC 16nm