24-bit Cap-less ADC PLL-less 2 channels
Overview
The sADC-H1-LR.02 is a mixed (analog and digital) Virtual Component containing 2 mono ADCs, and additional functions offering an ideal mixed-signal front-end for low-power and high-quality audio applications.
Key Features
- Patented PLL-less solution: generate all the sampling frequency through a single master clock frequency with no need of audio PLL
- Embedded low noise voltage regulator for best resilience to power supply noise
- Optimal sound recording performance thanks to high dynamic range and Automatic Gain control feature
Block Diagram
Technical Specifications
Foundry, Node
TSMC 28nm HPC+
Maturity
Silicon proven
TSMC
Silicon Proven:
28nm
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