The fully integrated 2.5G/1000M/100M/10M Quad-mode Media Access Controller (MAC) core for Ethernet applications is compliant with IEEE 802.3 standard and RGMII specifications. The PHY interface supports both RGMII and GMII interfaces. This Quad-Mode Core is configurable through software register.
The west-bound interface from the MAC provides a configurable 32-bit system interface.
The east-bound interface performs the mapping of transmit and receive data streams (at the PHY layer) to the on-chip SERDES or external PHY chip.
2.5G/1000M/100M/10M Quad-Mode MAC
Overview
Key Features
- Integrated Quad-mode operation MAC with RGMII and GMII interface for area efficiency
- Fully compatible with IEEE802.3 2015 standard, and RGMII specification 1.3 and 2.0
- Super low latency with minimized fixed and variable delay for network efficiency.
- Supports 1588v2 1-step and 2-step time stamps and full error handling
- Supports 802.1Qbb priority flow control (PFC)
- Interface Features
- Local clock 32-bit User interface to ease user integration
- GMII interface or RGMII Interface
- Support Full-duplex and half-duplex modes
- Support 2.5G/1000M/100M/10M PHYs
- Software in-operation configuration of duplex mode and operating speed
- GMAC Core Features
- TX MAC
- Short and Jumbo Framer Support
- TX FCS insertion – programmable control
- TX Preamble insertion – programmable control
- TX test pattern generation
- TX MAC control frame generation
- Unicast/Multicast PAUSE frame generation by MAC client or by software
- Software configurable PAUSE quanta
- TX Performance Monitoring and Statistics (counters are 32-bit with read-to-clear)
- Byte count
- Frame count
- Local PAUSE frame count
- Total PAUSE frame count
- Broadcast frame count
- Multicast frame count
- Unicast frame count
- Bad FCS frame count
- Undersize frame count
- Oversize frame count
- Fragmented frame count
- Jabber frame count
- Frame count statistic for the following sized frames:
- 64 byte
- 65-127
- 128-255
- 256-511
- 512-1023
- 1024-1518
- 1519-2047
- >= 2048
- * user define histogram is available
- RX MAC
- Short and Jumbo frame Support
- RX BER monitor
- RX FCS check and removal
- RX Preamble removal
- RX PAUSE frame processing and handling
- RX Performance Monitoring and Statistics (counters are 32-bit with read-to-clear)
- Drop count
- Byte count
- Frame count
- PAUSE frame count
- Broadcast frame count
- Multicast frame count
- Unicast frame count
- Bad FCS frame count
- Undersize frame count
- Oversize frame count
- Fragmented frame count
- Jabber frame count
- Frame count statistic for the following sized frames:
- 64 byte
- 65-127
- 128-255
- 256-511
- 512-1023
- 1024-1518
- 1519-2047
- >= 2048
- * user define histogram is available
- Additional Add-on features
- 1588v2 time stamping
- 802.1Qbb Priority Flow Control (PFC) up to 8 priorities
- Proven IP reduces development time and risk
- Support 2.5Gbps, 1000Mbps, 100Mbps and 10Mbps PHY interfaces
- Support GMII and RGMII interface natively
- Support Full duplex or half-duplex modes
- Support Carrier Extended and Link fault
- Off-the-shelf, proven technology implementation in FPGAs and ASIC SOC
- Tested and interoperability-proven
Benefits
Block Diagram
