2.56 MHz Digital filter

Overview

The block consists of 4 low pass filters connected in serially.
Decimation takes place during a filtration process after each stage. The total decimation coefficient is 64.
The block is fabricated on iHP SiGe BiCMOS 0.25 um (SGB25V) technology.

Key Features

SGB25V technology
Build-in clock former
Test modes – digital data output
Operating with complex signal
Low current consumption: 80 uA at the input sampling rate 2.56 MHz
Input data - the delta-sigma modulated signal
Small area: 1.4 mm2 on iHP SGB25V technology and supply voltage is 1.8 V
Portable to other technologies (upon request)

Applications

Delta-sigma ADC
Systems using a delta-sigma modulator signal as an input data

Deliverables

Schematic or NetList
Abstract model (.lef and .lib files)
Layout view (optional)
Behavioral model (Verilog)
Extracted view (optional)
GDSII
DRC, LVS, antenna report
Test bench with saved configurations (optional)
Documentation

Technical Specifications

Foundry, Node

iHP SiGe BiCMOS 0.25 um

Maturity

Silicon proven

Availability

Now

Request Info