180nm 5V Bandgap

Key Features

  • 2.5V-5.5V operation.
  • 3? 4% untrimmed voltage reference accuracy.
  • 2% variation over -40ºC to 125ºC after trimming.
  • 70dB low frequency PSRR.
  • Trimmed, temperature compensated, 10µA reference current outputs with 3% accuracy.
  • Trimmed IPTAT output currents can be provided.
  • Less than 8µV noise from 0.1Hz to 10KHz.
  • 3 bit voltage trimming.
  • 4 bit current trimming.
  • -40°C to 140°C temperature operation.
  • Small cell area: 0.02mm2 in 0.15µ Vanguard International Semiconductor BCD process.
  • TSMC 180nm also available.
  • <0.2mW typical power dissipation.

Block Diagram

180nm 5V Bandgap Block Diagram

Applications

  • Works with a 2 port Obsidian PD IP.
  • MPU system reference.
  • ADC/ DAC reference.
  • Sensor reference.

Deliverables

  • Verilog model.
  • Spice netlist for LVS.
  • Design review spice files.
  • GDS format layout.
  • LEF file.
  • Timing files.
  • Integration notes.
  • Production test notes.

Technical Specifications

Foundry, Node
TSMC 180nm
SMIC
Pre-Silicon: 180nm EEPROM , 180nm G , 180nm LL
TSMC
In Production: 180nm
Pre-Silicon: 180nm G
Silicon Proven: 180nm
VIS
In Production: 150nm
Silicon Proven: 150nm
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Semiconductor IP