This macro-cell is a low power general purpose current bias generator core designed for TowerJazz 0.18µm TS18SL CMOS technology.
The circuit generates 2 × NMOS 17nA current branches. The current bias is temperature compensated. Output currents come from NMOS drain terminals, thus being sink-type sources.
17nA Current Bias with Enable - Low Voltage (1.0V), Ultra Low Power (90nW @ 1.8V) TowerJazz 0.18 um
Overview
Key Features
- Low power current bias
- Low TC
- Ibias=17nA ±12% (without trimming)
- Current consumption lower than 61nA in active mode
- Flexible voltage operation: 1.0V–2.0V
- Enable control
- Indicative area: 0.0037mm2
Block Diagram
Applications
- Passive/active RFID tag ICs
- Portable devices
- Energy Harvesting ICs
- Hearing Aids
Deliverables
- Datasheet/Integration Guide
- HDL Model
- Flat GDSII database/LVS netlist
- Customer Support
Technical Specifications
Foundry, Node
TowerJazz 0.18 um
Maturity
Silicon Proven
Silterra
Silicon Proven:
180nm
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