14bit 1.3Gsps High Speed Sigma Delta ADC IP Core
Overview
High performance, 14-bit resolution, 1.3Gsps sample rate Sigma Delta IP core, nodes up to 28nm Silicon proven. Leading edge systems on chip (SoCs) for wireline networking, wireless communication, and automobile ADAS are made possible by these items. Our data converter (ADC and DAC) IP cores include resolutions ranging from 6 bits to 14 bits and sampling speeds ranging from a few MSPs to over 20GSPS.
Key Features
- Reduces noise and power consumption
- Increases ADC channel speed
- Provides accurate charge transfer without the need for calibration
- Relaxes op-amp gain, bandwidth, and offset requirements
- Simplifies high-performance analog designs
Benefits
- Available in 28nm nodes
- Silicon Proven
- Excellent linearity
- Compact area
- Complete subsystem with:
- Bandgap reference
- Sigma delta
Applications
- 5G Wireless Infrastructure
- Automotive Ethernet
- Automotive LiDAR/RADAR
- Wireline Communication
- Wireless Communication
- Image Sensors
- Satellite Communication
Deliverables
- CDL netlists
- Liberty timings
- Verilog description
- A full datasheet
- An integration note
Technical Specifications
Maturity
In Production
Availability
Immediate
Related IPs
- 14bit 3.2Gsps High Speed Sigma Delta ADC IP Core
- 14-bit, 4.32Gsps Ultra high speed Wideband, Time-Interleaved Pipeline ADC IP
- High speed NoC (Network On-Chip) Interconnect IP
- 800MHz, 12-bit High Speed Delta Sigma ADC for 5G, LiDAR and Imaging
- 40MHz, 12-bit High Speed Delta Sigma ADC for 5G, LiDAR and Imaging
- 80MHz, 12-bit High Speed Delta Sigma ADC for 5G, LiDAR and Imaging