128x8 Bits OTP (One-Time Programmable) IP, TSMC 55nm LP 1.2V/2.5V & ULP 0.9V/2.5V Mixed-Signal, General Purpose Process

Overview

The ATO00128X8TS055ULP3NA is organized as 128x8 one-time programmable (OTP) in 8-bit read and 1-bit program modes. This is a kind of non-volatile memory fabricated in TSMC 55nm LP 1.2V/2.5V & ULP 0.9V/2.5V Mixed-Signal, General Purpose process. The OTP can be widely used in chip ID, security key, memory redundancy, parameter trimming,
configuration setting, feature selection, and PROM, etc.

Key Features

Fully compatible with TSMC 55nm LP 1.2V*/2.5V & ULP 0.9V*/2.5V CMOS process
Wide voltage range: 0.81 V (0.9 V-10%)–1.32 V (1.2 V+10%) read voltage and 2.5 V± 5% program voltage
High speed: 10-µs program time per bit, & 100-ns read cycle time (10 Mhz, max.), 8-bit at a time
Ultra-low read energy: <3 pJ per bit
Wide operating temperature range: -40°C to 85°C for read and 10 °C to 40 °C temperature for program

Benefits

Small IP size
Wide voltage range
High reliability
Wide operating temperature range
Silicon characterized and qualified

Deliverables

Datasheet
Verilog behavior model and test bench
Timing library
LEF File
Phantom GDSII database

Technical Specifications

Foundry, Node

TSMC 55nm LP 1.2V/2.5V & ULP 0.9V/2.5V Mixed-Signal, General Purpose Process

Maturity

Silicon Proven & Ready for Production

Availability

Now

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