Auxiliary DAC - 12-bit Successive Approximation Register (SAR) DAC

Overview

This digital-to-analog converter implements segmented R-2R and thermometer decoder architecture to achieve 12-bit resolution. The DAC consists of input data latch, control logic and resistor ladder offers single-ended or differential voltage output by a build-in analog buffer amplifier. The DAC support data update rate up to 1Msps and offer power-down mode to reduce power dissipation.

It is suitable for integrated auxiliary DAC applications and multi-converter architectures.

 

Key Features

  • Silicon proven in 22, 28, 40, 55, 65, 110, 130, 180nm from SMIC, HHgrace, GlobalFoundries and Samsung
  • Resolution: 12-bit
  • Update Rate: 1Msps
  • Power Consumption
    •   1mA@1Msps
  • Single-ended or Differential voltage output
  • Analog Output Range
    •   VREFH to VREFL
    •   DNL: ±1 LSB, INL: ±1.5 LSB
  • Flexible Control Logic

Block Diagram

Auxiliary DAC - 12-bit Successive Approximation Register (SAR) DAC Block Diagram

Applications

  • Industrial process control
  • Digital calibration
  • Data acquisition systems
  • Motion control systems

Technical Specifications

Foundry, Node
GLOBALFOUNDRIES 28nm SLP
Maturity
Available on request
GLOBALFOUNDRIES
Pre-Silicon: 28nm SLP
SMIC
Pre-Silicon: 28nm , 40nm LL , 55nm G , 65nm LL , 110nm G , 180nm G
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Semiconductor IP