The 1.8V Support: Power library provides a full complement of cells to support the assembly of a complete pad ring by abutment. It is supplied as a standard addition to the GPIO libraries and other I/O library offerings from Aragio Solutions that use a compatible pad ring bus structure.
These 7nm libraries are available in inline and staggered flip chip implementations.
The included rail splitter allows multiple power domains to be isolated in the same pad ring while maintaining continuous
VDD/VSS for robust ESD protection.
1.8V Power Support I/O Pad Set
Overview
Key Features
- ESD Protection:
- JEDEC compliant
- 2KV ESD Human Body Model (HBM)
- 500 V ESD Charge Device Model (CDM)
- Latch-up Immunity:
- JEDEC compliant
- Tested to I-Test criteria of ± 100mA @ 125°C
Technical Specifications
Foundry, Node
TSMC 7nm
Maturity
Silicon Proven
Availability
Available Now
TSMC
Pre-Silicon:
7nm