A Flip-Chip compatible I/O Library in TSMC 180nm BCD with 1.8V GPIO, 1.8V to 3.3V Analog, with associated ESD cells.
The silicon-proven I/O library in TSMC 180nm BCD provides a reliable and flexible solution for mixed-signal, power management, and BCD applications. The library includes a 1.8V digital I/O cell, optimized for up to 100MHz operation at 15pF, ensuring efficient high-speed performance. It also features 1.8V and 3.3V baseline analog I/Os, along with custom low-leakage 3.3V analog I/Os, tailored for low-power and precision-driven designs. Engineered for robustness, the I/Os meet 2kV HBM and 500V CDM ESD targets, providing strong protection against electrostatic events. With a balance of performance, power efficiency, and reliability, this I/O library enables seamless integration into demanding BCD and mixed- signal designs, making it an ideal choice for power management and analog-rich applications.
Operating Conditions
| Parameter | Value |
| Core Device | 1.8V Standard |
| I/O Device | 3.3V Standard |
| BEOL | 1P6M |
| PAD | Non Cup, 60um Pitch |
| Cell Height | 80um |
| Temperature | -40C to 125C |
| ESD | 2kV HBM & 500V CDM, Latch-Up Immune |
Cell Summary
| Item | Size |
| RS18_GPIO | Standard 150MHz, 1.8V |
| RS18_DANA | Analog I/O |
| RS18_ANA | 1.8V Analog I/O |
| RS18_ANA3X | 3.3V Analog I/O |
| RS18_VPP | Programming VDD |
ESD Summary
- ESD targets of 2kV HBM, 500V CDM, Latch-up Immune
- Has passed >4kV HBM and >800V CDM, depends on packaging
- Latch-Up immunity has passed >150mA
