0.9V/1.2V I/O Library in TSMC 55nm

Overview

A 0.9V/1.2V I/O Library in TSMC 55LP.

This SoundWire Digital I/O Library in TSMC 55nm LP offers an advanced, low-power interface solution for high-performance audio applications. Supporting 0.9V/1.2V operation, this library provides Data, Clock, and Select I/Os, enabling seamless integration with SoundWire-based systems while delivering enhanced power efficiency. This next-generation library intro duces auto delay calibration, improving timing precision and signal integrity beyond previous versions. Built for reliability, the I/O cells meet 2kV HBM, 500V CDM, and 8kV system-level ESD protection (150pF, 330 direct contact to housing), with 18kV air discharge capability, ensuring robust protection against electrostatic and environmental stress. Ideal for low-power, high-fidelity audio designs, this I/O library provides superior performance with enhanced calibration and compliance with industry standards.

 Operating Conditions

Feature Value
Core Device 0.9V Standard
I/O Device 1.2V Standard
BEOL 1P9M
Cell Height 130um
Tj -40C to 125C
ESD 2kV HBM, 500V CDM, 8kV IEC
Latch-up 100mA @ +85C

Cell Names 

Cell Name Cell Type
TF_DATA Digital Output
TF_CLK Digital Input
TF_SELECT Digital InOut
TF_DELAY Auxiliary
TF_ANA Analog I/O
TF_AVDD Analog Power
TF_AVSS Analog Ground
TF_DVDD VDDIO Power
TF_DVSS VDDIO Ground



 

Key Features

  •  DATA I/O Features
    •  Power down mode
    •  Output enable/disable
    •  Fail-Safe Operation
    •   Programmable Drive Strengths
    •  Output impedance control
  • CLOCK I/O Features
    •  Dual voltage-level output
    •  Pull-down resistor
    •   Line-control pull-up resistor
    •   Internal 3M ohm pull-down resistor
    •  Fail-safe input
  •  SELECT I/O Features
    •   6.5V tolerant OTP input
    •   Schmitt Trigger Input
    •   10Mhz digital output mode
    •   1.8M ohm input pulldown
    •   Selected hysteresis levels
    •   Analog test point

Block Diagram

0.9V/1.2V I/O Library in TSMC 55nm Block Diagram

Technical Specifications

Foundry, Node
TSMC 55nm
TSMC
Silicon Proven: 55nm LP
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Semiconductor IP