0.035... 100 MHz intermediate-frequency amplifier

Overview

IFA consists of 6-stage amplifier with tunable gain, AGC system, linear output buffer for differential analog output.
Gain is sequentially reduced from the last stage to the first stage. This method allows to keep a low noise figure in wide gain range.
The IFA is designed using TSMC 65 nm CRN65LP technology.

Key Features

TSMC 65 nm CRN65LP technology
Differential inputs, outputs
High frequency 0.035 – 100 MHz
High linearity
Automatic gain control (AGC) system
AGC detector threshold adjustment in the digital mode
Portable to other technologies (upon request)

Applications

Point-to-point data transmission
Multidrop buses
Clock distribution
Backplane receiver
Backplane data transmission
Cable data transmission

Deliverables

Schematic or NetList
Abstract model (.lef and .lib files)
Layout view (optional)
Behavioral model (Verilog)
Extracted view (optional)
GDSII
DRC, LVS, antenna report
Test bench with saved configurations (optional)
Documentation

Technical Specifications

Foundry, Node

TSMC CMOS 65 nm

Maturity

silicon proven

Availability

Now

TSMC

Silicon Proven: 65nm G

Request Info