e-MMC vs. NAND with built-in ECC
Doug Wong, Toshiba America Electronic Components, Inc.
8/18/2011 9:44 AM EDT
As NAND flash continues to increase in density and decrease in cost per gigabyte, it has enabled more cost-effective storage. This benefits a wide (and constantly growing) range of digital consumer products. Selecting the most appropriate high performance NAND architecture for any given application is of increasing importance as the ECC requirements for NAND continue to increase.
This article will explore the attributes of and differences between e-MMC and NAND with built-in ECC (such as Toshiba’s SmartNANDTM) – as well as go into detail about the applications that are best suited for each.
To read the full article, click here
Related Semiconductor IP
- JESD204E Controller IP
- eUSB2V2.0 Controller + PHY IP
- I/O Library with LVDS in SkyWater 90nm
- 50G PON LDPC Encoder/Decoder
- UALink Controller
Related Articles
- Seven Key Advantages of Implementing eFPGA with Soft IP vs. Hard IP
- David vs. Goliath: Can Small Models Win Big with Agentic AI in Hardware Design?
- Symbolic Simulation Formally Verifies ECC
- Architecture-based vs. flow-based approach to DFT
Latest Articles
- Crypto-RV: High-Efficiency FPGA-Based RISC-V Cryptographic Co-Processor for IoT Security
- In-Pipeline Integration of Digital In-Memory-Computing into RISC-V Vector Architecture to Accelerate Deep Learning
- QMC: Efficient SLM Edge Inference via Outlier-Aware Quantization and Emergent Memories Co-Design
- ChipBench: A Next-Step Benchmark for Evaluating LLM Performance in AI-Aided Chip Design
- COVERT: Trojan Detection in COTS Hardware via Statistical Activation of Microarchitectural Events