Project maps ARM core variability at 32-nm
Peter Clarke, EETimes
9/21/2010 7:11 AM EDT
LONDON – A European collaborative research project has spent 2.5 years and 4.45 million euro (about $5.8 million) performing a characterization of an ARM926 core for the statistical variability that is inherent at the 32-nm manufacturing process node.
The project, called Reality for short and "Reliable and variability tolerant system-on-a-chip design in more-moore technologies" in full, was set up in 2008 to address issues around design for variability, which becomes increasingly significant at geometries below 32-nm.
To read the full article, click here
Related Semiconductor IP
- Specialized Video Processing NPU IP for SR, NR, Demosaic, AI ISP, Object Detection, Semantic Segmentation
- Ultra-Low-Power Temperature/Voltage Monitor
- Multi-channel Ultra Ethernet TSS Transform Engine
- Configurable CPU tailored precisely to your needs
- Ultra high-performance low-power ADC
Related News
- Legend Announces Software Tool for Semiconductor Process Optimization, Verification and Statistical Characterization
- Renesas Technology Adopts Stratosphere Solutions' StratoPro-STX Variability Characterization Platform for 45nm
- Synopsys and Silicon Metrics Deliver Memory Characterization Solution for System-on-Chip Design
- TSMC Adopts Sequence Design Interconnect Modeling Intellectual Property for Technology Characterization
Latest News
- Siemens accelerates integrated circuit design and verification with agentic AI in Questa One
- Weebit Nano achieves record half-year revenue; licenses ReRAM to Tier-1 Texas Instruments
- IObundle Releases Open-Source UART16550 Core for FPGA SoC Design
- Rapidus Secures 267.6 Billion Yen in Funding from Japan Government and Private Sector Companies
- DNP Invests in Rapidus to Support the Establishment of Mass Production for Next-Generation Semiconductors