Ultra-Low-Power Temperature/Voltage Monitor in TSMC 40nm IP
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Ultra-low-power 60 GHz radar-on-chip
- CSEM has developed a low-cost, ultra-low-power 60 GHz MIMO FMCW PHY that can be integrated into radar-on-chips with custom digital processing for specific applications.
- This solution leverages CSEM’s decades of experience in ultra-low-power RF CMOS system-on-chip design.
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Small, ultra-low-power, and very processing-efficient 32-bit processor
- Ultra-Low Power
- Optional Processor Units
- Pre-Integrated Platforms
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Ultra-low-power 2.4 GHz transceiver for Bluetooth 5.3, 802.15.4 and IoT
- The icyTRX ultra-low-power RF transceiver is designed to meet standards such as Bluetooth Low Energy (BLE), 802.15.4 PHY Layer (e.g. ZigBee), and proprietary standards with data rates from 62.5 kBit/s up to 4 Mbit/s.
- icyTRX offers 5.3 mW consumption in receive mode from a 1.0 V supply. icyTRX is a complete transceiver that is designed for miniaturization, yielding an area of analog RF of less than 1 mm2 in 55 nm CMOS, requiring minimal external components thanks to high degree of integration. icyTRX is designed for easy integration into ASICs and SoCs.
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VeriSilicon SMIC 0.13um Ultra-Low-Power Synchronous Single-Port SRAM compiler,Memory Array Range:512 to 512K Bits
- Single Read/Write Port
- Low Power Consumption
- High Density
- High Speed
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Ultra-low-power Processor based on RISC-V Architecture
- The icyflex-V processor is a new ultra-low-power core based on the RISC-V 32-bit ISA, compatible with off-the-shelf open-source and/or proprietary programming tools.
- This new development represents a cost effective yet performing alternative to proprietary cores for next-generation ultra-low-power system-on-chip developments.
- The core was optimized for performance, code density and power consumption and delivers up to 3.2 CoreMark/MHz while consuming as low as 14 uA/MHz in TSMC 55 nm low-power process.
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Ultra-Low-Power 6-13 Bit 1-10 kS/s 1.9 µW SAR ADC on XFAB XT018
- The IP consists of a Successive Approximation Register (SAR) architecture ADC using charge-redistribution technique.
- The ADC IP is configurable regarding resolution (6-13 bit) and sample rate (up to 10kS/s) and power consumption down to 1.9 µW. The input voltage range is quasi-rail-to-rail guaranteeing more than + 1.7 V@ 1.8V power supply.
- An optional calibration technique can be applied to compensate degraded mismatch behavior of technology capacitors.
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Ultra-Low-Power Bandgap Voltage Reference in TSMC 4nm CMOS
- Precision band-gap reference
- 40dB AC PSRR, 50dB DC PSRR
- ±12mV voltage accuracy
- 30ppm/C temperature drift
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Ultra-Low-Power (<140nA) Bandgap Voltage Reference in 40nm CMOS
- 140nA supply current
- Less than 40ppm/C temperature coefficient
- - 40C to 125C operation
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Ultra-Low-Power Bandgap Voltage Reference in GF 22 FDX
- Precision band-gap reference
- 40dB AC PSRR, 50dB DC PSRR
- ±12mV voltage accuracy
- 30ppm/C temperature drift
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Ultra-Low-Power Bandgap Voltage Reference in 12nm CMOS
- Precision band-gap reference
- 40dB AC PSRR, 50dB DC PSRR
- ±12mV voltage accuracy