Usb 3 IP

Compliant with SSIC specification 1.0
Compliant with MIPI-MPHY (Type-1) specification Rev 3.0-r.03
Interfaces to the USB3 Device/Host controller via the standard PIPE3 interface at 8/16/32-bit data widths

The USB 3.0 Device Upgrade provides a dedicated dual simplex, routable packet architecture for USB3.0 packet transfers, with a disable option for power savings.
The USB 3.0 Upgrade IP supports all power management features as well as a dedicated link manager for each downstream port for increased efficiency.

USB 3.2 Dual Role Device (DRD) softcore semiconductor IP is designed for applications requiring both USB Host and Device implementation.
This core comprises USB3.2 SSP, SS, HS/FS/LS Host, and Device controllers in a single codebase that supports role-swap functionality

XtremeSilica’s USB 3.2 Verification IP offers a comprehensive solution for validating designs based on the USB 3.2 specification. It supports SuperSpeed+ data rates up to 20 Gbps, ensuring protocol compliance, power management, and seamless interoperability across versions.
The product’s advanced features include dynamic link negotiation validation, error injection, and robust debugging tools. It enables testing across a range of devices, ensuring high-speed data transfer and reliable performance in both legacy and modern USB designs

Fully compliant with USB 3.2 specification version 1.1, xHCI Specification Revision 1.2, and Pipe Interface 6.1.1 with Message Bus Interface for USB3.2 Architecture with backward compatibility to USB3.1, USB3.0 and USB2.0 (including USB2.0, USB 3.0. OTG)
Supports USB Type-C.
Supports up to 128 devices including hub and device on any tier level.
Supports 15 IN and 15 OUT and 1 control endpoint for each device.

The OTC9115 is a complete, low cost, single chip cable marker for USB PD Type-C (baseband) cables.
In low silicon area and just 4 IOs, the device has been designed exclusively for very high volume Type-C cables with basic marker requirements.

USB 3 IP