Tensilica IP
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24
IP
from 3 vendors
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10)
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Compact neural network engine offering scalable performance (32, 64, or 128 MACs) at very low energy footprints
- Best-in-Class Energy
- Enables Compelling Use Cases and Advanced Concurrency
- Scalable IP for Various Workloads
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Tensilica ConnX 110/120
- Certified ISO 26262:2018 ASIL-compliant
- VLIW parallelism issuing multiple concurrent operations per cycle
- 128-bit or 256-bit SIMD
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Tensilica AI Max - NNA 110 Single Core
- Scalable Design to Adapt to Various AI Workloads
- Efficient in Mapping State-of-the-Art DL/AI Workloads
- End-to-End Software Toolchain for All Markets and Large Number of Frameworks
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Tensilica ConnX B10/B20
- Single-instruction, multiple-data (SIMD) vector processing
- Up to 5-issue very long instruction word (VLIW) for parallel load/store, MAC, and ALU ops
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Tensilica DSP IP supports efficient AI/ML processing
- Powerful DSP Instruction Set Supporting AI/ML Operations.
- Mixed Workloads.
- Industry-Leading Performance and Power Efficiency.
- End-to-End Software Toolchain for All Markets and a Large Number of Frameworks.
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Tensilica FloatingPoint KQ7/KQ8 DSPs
- VLIW parallelism issuing multiple concurrent operations per cycle
- 512-bit and 1024-bit SIMD
- IEEE 754 vector floating-point (HP, SP, DP)
- Performance-optimized fused multiply-add (FMA)
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Tensilica FloatingPoint KP1/KP6 DSPs
- VLIW parallelism issuing multiple concurrent operations per cycle
- Xtensa LX Secure Mode
- 128-bit and 512-bit SIMD
- IEEE 754 vector floating-point
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Tensilica HiFi 1 DSP
- Cycle and energy efficient for Bluetooth and Bluetooth Low Energy (BLE) codecs for speech and music
- Efficient neural network acceleration ISA and architecture support
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Tensilica Vision Q7 DSP
- Doubles Vision and AI Performance for Automotive, AR/VR, Mobile and Surveillance Markets
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Tensilica Fusion F1 DSP
- Specialized design to take advantage of sparsity in weights and activations for compute and bandwidth reduction
